SVNews r322361

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2017-08-10 14:18:09 - r322361 by br (br)

Complete list of files affected by revision r322361:

(Note: At the moment, these links point to ViewVC on They are probably slow. Do not overuse.)

  History   Contents   Diff   MODIFY   /head/lib/csu/riscv/crt1.c  
  History   Contents   Diff   MODIFY   /head/lib/csu/riscv/crti.S  
  History   Contents   Diff   MODIFY   /head/lib/libc/riscv/gen/fabs.S  
  History   Contents   Diff   MODIFY   /head/libexec/rtld-elf/riscv/reloc.c  
  History   Contents   Diff   MODIFY   /head/share/mk/  
  History   Contents   Diff   MODIFY   /head/share/mk/  
  History   Contents     DELETE   /head/sys/boot/fdt/dts/riscv  
  History   Contents   Diff   MODIFY   /head/sys/conf/Makefile.riscv  
  History   Contents   Diff   MODIFY   /head/sys/conf/files.riscv  
  History   Contents   Diff   MODIFY   /head/sys/conf/  
  History   Contents   Diff   MODIFY   /head/sys/riscv/conf/GENERIC  
  History   Contents     DELETE   /head/sys/riscv/conf/LOWRISC  
  History   Contents     DELETE   /head/sys/riscv/conf/LOWRISC.hints  
  History   Contents     DELETE   /head/sys/riscv/conf/QEMU  
  History   Contents     DELETE   /head/sys/riscv/conf/ROCKET  
  History   Contents     DELETE   /head/sys/riscv/conf/SPIKE  
  History   Contents   Diff   MODIFY   /head/sys/riscv/include/machdep.h  
  History   Contents   Diff   MODIFY   /head/sys/riscv/include/riscvreg.h  
  History   Contents   Diff   MODIFY   /head/sys/riscv/include/sbi.h  
  History   Contents   Diff   MODIFY   /head/sys/riscv/riscv/cpufunc_asm.S  
  History   Contents   Diff   MODIFY   /head/sys/riscv/riscv/exception.S  
  History   Contents   Diff   MODIFY   /head/sys/riscv/riscv/intr_machdep.c  
  History   Contents   Diff   MODIFY   /head/sys/riscv/riscv/locore.S  
  History   Contents   Diff   MODIFY   /head/sys/riscv/riscv/machdep.c  
  History   Contents   Diff   MODIFY   /head/sys/riscv/riscv/nexus.c  
  History   Contents   Diff   MODIFY   /head/sys/riscv/riscv/pmap.c  
  History   Contents   Diff   MODIFY   /head/sys/riscv/riscv/riscv_console.c  
  History   Contents     DELETE   /head/sys/riscv/riscv/sbi.S  
  History   Contents   Diff   MODIFY   /head/sys/riscv/riscv/swtch.S  
  History   Contents   Diff   MODIFY   /head/sys/riscv/riscv/timer.c  
  History   Contents   Diff   MODIFY   /head/sys/riscv/riscv/trap.c  
  History   Contents   Diff   MODIFY   /head/sys/riscv/riscv/vm_machdep.c  

Commit message:

Support for v1.10 (latest) of RISC-V privilege specification.

New version is not compatible on supervisor mode with v1.9.1
(previous version).

  o BBL (Berkeley Boot Loader) provides no initial page tables
  anymore allowing us to choose VM, to build page tables manually
  and enable MMU in S-mode.
  o SBI interface changed.
  o GENERIC kernel.
  FDT is now chosen standard for RISC-V hardware description.
  DTB is now provided by Spike (golden model simulator). This
  allows us to introduce GENERIC kernel. However, description
  for console and timer devices is not provided in DTB, so move
  these devices temporary to nexus bus.
  o Supervisor can't access userspace by default. Solution is to
  set SUM (permit Supervisor User Memory access) bit in sstatus
  o Compressed extension is now turned on by default.
  o External GCC 7.1 compiler used.
  o _gp renamed to __global_pointer$
  o Compiler -march= string is now in use allowing us to choose
  required extensions (compressed, FPU, atomic, etc).

Sponsored by: DARPA, AFRL
Differential Revision:


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